;
; hello.step.45.asm
;
; read and send step response
;
; Neil Gershenfeld
; CBA MIT 10/24/09
;
; (c) Massachusetts Institute of Technology 2009
; Permission granted for experimental and personal use;
; license for commercial sale available from MIT.

.include "tn45def.inc"
;
; definitions
;
.equ tx_pin = PB2 ; transmit pin
.equ charge_pin = PB3 ; charging pin
;
; registers
;
.def bit_count = R16 ; bit counter
.def temp = R17 ; temporary storage
.def temp1 = R18 ; temporary storage
.def txbyte = R19 ; data byte
.def countl = R24 ; time for the comparator to cross (low byte)
.def counth = R25 ; time for the comparator to cross (high byte)
;
; code segment
;
.cseg
.org 0
rjmp reset ; jump to reset routine
;
; bit delay
; serial bit delay
;
.equ b = 13 ; 9600 baud (clock /8)
;.equ b = 130 ; 9600 baud (clock /1)
;.equ b = 8 ; 115200 baud (clock /1)
bit_delay:
   ldi temp, b
   bitloop:
      dec temp
      brne bitloop
   ret
;
; putchar
; assumes no line driver (doesn't invert bits)
;
.equ sb = 1; number of stop bits
putchar:
   ldi bit_count, 9+sb; 1+8+sb
   com txbyte; invert everything
   sec; set start bit
   putchar0:
      brcc putchar1; if carry set
      cbi PORTB, tx_pin; send a '0'
      rjmp putchar2; else	
   putchar1:
       sbi PORTB, tx_pin	; send a '1'
       nop ; even out timing
   putchar2:
       rcall bit_delay; one bit delay
       rcall bit_delay
       lsr txbyte; get next bit
       dec bit_count; if not all bits sent
       brne putchar0; send next bit
   ret;
;
; char_delay
; delay between characters
;
char_delay:
ldi temp, 255
char_delay_loop:
   ldi temp1, 255
   char_delay_loop1:
      dec temp1
      brne char_delay_loop1
   dec temp
   brne char_delay_loop
   ret
;
; settle
; delay for charge to settle
;
.equ delay = 255
settle:
   ldi temp, delay
   settleloop:
      dec temp
      brne settleloop
   ret
;
; main program
;
reset:
   ;
   ; set clock divider to /1
   ;
   ;ldi temp, (1 << CLKPCE)
   ;ldi temp1, (0 << CLKPS3) | (0 << CLKPS2) | (0 << CLKPS1) | (0 << CLKPS0)
   ;out CLKPR, temp
   ;out CLKPR, temp1
   ;
   ; set stack pointer to top of RAM
   ;
   ldi temp, high(RAMEND)
   out SPH, temp
   ldi temp, low(RAMEND)
   out SPL, temp
   ;
   ; init comm and charge pins for output
   ;
   sbi PORTB, tx_pin
   sbi DDRB, tx_pin
   sbi PORTB, charge_pin
   sbi DDRB, charge_pin
   ;
   ; init comparator
   ;
   sbi ACSR, ACBG ; use bandgap reference as positive comparator input
   sbi ADCSRB, ACME ; use ADC multiplexer to select negative comparator input
   sbi ADMUX, MUX1 ; set negative comparator input to ADC2 (PB4)
   cbi ADMUX, MUX0 ; "
   ;
   ; start main loop
   ;
   loop:
      ;
      ; charge capacitor
      ;
      sbi PORTB, charge_pin
      rcall char_delay
      ;rcall settle

      clr countl
      clr counth
      cbi PORTB, charge_pin

      delayloop:
         adiw countl, 1
         sbis ACSR, ACO
         rjmp delayloop
     
      ; from: counth:countl = hhhhhhhh:llllllll
      ; to:   counth:countl = hhhhhhl1:lllllll0
      lsl countl
      rol counth
      sec
      rol counth
     
      mov txbyte, countl
      rcall putchar
      mov txbyte, counth
      rcall putchar

      ;rcall char_delay

      rjmp loop