#include <avr/io.h>

#define F_CPU 2500000UL
#include <util/delay.h>

#include "output.h"

////////// Begin modified hello.mic
#define output(directions,pin) (directions |= pin) // set port direction for output
#define set(port,pin) (port |= pin) // set port pin
#define clear(port,pin) (port &= (~pin)) // clear port pin
#define pin_test(pins,pin) (pins & pin) // test for port pin
#define bit_test(byte,bit) (byte & (1 << bit)) // test for bit set
#define bit_delay_time 100 // bit delay for 9600 with overhead
#define bit_delay() _delay_us(bit_delay_time) // RS232 bit delay
#define half_bit_delay() _delay_us(bit_delay_time/2) // RS232 half bit delay
#define char_delay() _delay_ms(10) // char delay

#define NPTS 100 // points in buffer

#define serial_port PORTA
#define serial_direction DDRA
#define serial_pins PINA
#define serial_pin_out (1 << PA1)

void put_char(volatile unsigned char *port, unsigned char pin, char txchar) {
   //
   // send character in txchar on port pin
   //    assumes line driver (inverts bits)
   //
   // start bit
   //
   clear(*port,pin);
   bit_delay();
   //
   // unrolled loop to write data bits
   //
   if bit_test(txchar,0)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,1)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,2)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,3)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,4)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,5)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,6)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   if bit_test(txchar,7)
      set(*port,pin);
   else
      clear(*port,pin);
   bit_delay();
   //
   // stop bit
   //
   set(*port,pin);
   bit_delay();
   //
   // char delay
   //
   bit_delay();
   }

   //////////////////////

int main()
{

  // configure pin PA1 as an output pin
  DDRA |= (1 << DDA1);

  static unsigned char i,array_lo[NPTS],array_hi[NPTS];

  // Clock  divider - Data sheet Page 82
  TCCR0B = (0<<CS02) | (0<<CS01) | (1<<CS00); // does not effect _delay_ms()

  // Positive = PA3
  // Negative = PA2
  // 20x gain
  ADMUX |= (1 << MUX5)  | (1 << MUX4) | (1 << MUX0);
  // 1.1V ref
  ADMUX |= (1 << REFS1) | (0 << REFS0);

  // enable
  ADCSRA |= (1 << ADEN);
  // prescalar /64
  ADCSRA |=  (1 << ADPS2) | (1 << ADPS1) | (0 << ADPS0);

  init_pwm();

  led_level(1);
  out_off();

  while (1) {

    // send framing
    put_char(&serial_port, serial_pin_out, 1);
    char_delay();
    put_char(&serial_port, serial_pin_out, 2);
    char_delay();
    put_char(&serial_port, serial_pin_out, 3);
    char_delay();
    put_char(&serial_port, serial_pin_out, 4);
    char_delay();

    // free-running sample loop
    for (i = 0; i < NPTS; ++i) {

      // initiate conversion
      ADCSRA |= (1 << ADSC);

      // wait for completion
      while (ADCSRA & (1 << ADSC))
        ;

      // save result
      array_lo[i] = ADCL;
      array_hi[i] = ADCH;
      led_level(ADCL);
    }

    for (i = 0; i < NPTS; ++i) {

      // send result
      put_char(&serial_port, serial_pin_out, array_lo[i]);
      put_char(&serial_port, serial_pin_out, array_hi[i]);
    }
  }

} // main