Makefile tutorial: http://www.cs.colby.edu/maxwell/courses/tutorials/maketutor/ normally type in terminal gcc -o hellomake hellomake.c hellofunc.c -I. (-I. : gcc will look in the current directory (.) for the include files) 2 problems: inefficient / not automatized + have to recompile everything everytime Makefile: "makefile" or "hello.make" etc command: make : executes the first rule in the file Some macros: $@: name before the : in rule head $^: after the : in rule head S<: first item after : in rule head $(NAME): access a macro name headers DEPS name object files OBJ name compiler CC name flags CFLAGS EX1: hellomake: hellomake.c hellofunc.c gcc -o hellomake hellomake.c hellofunc.c -I. Note 1: By putting the list of files on which the command depends on the first line after the :, make knows that the rule hellomake needs to be executed if any of those files change. Note 2: need tab before the gcc command EX2: CC=gcc CFLAGS=-I. hellomake: hellomake.o hellofunc.o $(CC) -o hellomake hellomake.o hellofunc.o -I. Note 1: variables / macros used : VARNAME=string then use $(VARNAME) Note 2: putting the object files: knows that the .c files must be compiled individually EX3: CC=gcc CFLAGS=-I. DEPS = hellomake.h %.o: %.c $(DEPS) $(CC) -c -o $@ $< $(CFLAGS) hellomake: hellomake.o hellofunc.o gcc -o hellomake hellomake.o hellofunc.o -I. Note 1: new macro for header file Note 2: new rule: any object file depends on corresponding .c file + headers Note 3: -the -c flag says to generate the object file -the -o $@ says to put the output of the compilation in the file named on the left side of the : -the $< is the first item in the dependencies list EX4: CC=gcc CFLAGS=-I. DEPS = hellomake.h OBJ = hellomake.o hellofunc.o %.o: %.c $(DEPS) $(CC) -c -o $@ $< $(CFLAGS) hellomake: $(OBJ) gcc -o $@ $^ $(CFLAGS) Note 1: Better syntax EX5: IDIR =../include CC=gcc CFLAGS=-I$(IDIR) ODIR=obj LDIR =../lib LIBS=-lm _DEPS = hellomake.h DEPS = $(patsubst %,$(IDIR)/%,$(_DEPS)) _OBJ = hellomake.o hellofunc.o OBJ = $(patsubst %,$(ODIR)/%,$(_OBJ)) $(ODIR)/%.o: %.c $(DEPS) $(CC) -c -o $@ $< $(CFLAGS) hellomake: $(OBJ) gcc -o $@ $^ $(CFLAGS) $(LIBS) .PHONY: clean clean: rm -f $(ODIR)/*.o *~ core $(INCDIR)/*~ Note 1: libraries, includes and objects now in other directories Note 2: macro for libraries we want to include: -lm is the math lib Note 3: make clean cleans up directories / .PHONY makes the file named "clean" ignored Note 4: http://web.mit.edu/gnu/doc/html/make_4.html