USB 20 MHz ISP 0Ω 1μF 100Ω 10K A C A C 100Ω R_pullup D 3.3V D 3.3V ATTiny44 >NAME >VALUE >NAME >VALUE <b>SMALL OUTLINE DIODE</b> >NAME >VALUE GND MOSI VCC RST SCK MISO <b>Small Outline Package</b> >NAME >VALUE VCC GND PB0 PB1 PB2 PA7 PA6 PA0 PA1 PA2 PA3 PA4 PA5 RST >NAME >VALUE GND D+ D- V >VALUE <b>EAGLE Design Rules</b> <p> Die Standard-Design-Rules sind so gewählt, dass sie für die meisten Anwendungen passen. Sollte ihre Platine besondere Anforderungen haben, treffen Sie die erforderlichen Einstellungen hier und speichern die Design Rules unter einem neuen Namen ab. <b>EAGLE Design Rules</b> <p> The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name. Since Version 6.2.2 text objects can contain more than one line, which will not be processed correctly with this version.