Vi <yU P x G#yĹx Gx G9@@TopRoute2Route3Route4Route5Route6Route7Route8 Route9 Route10 Route11 Route12 Route13Route14Route15BottomPadsViasUnroutedDimensiontPlacebPlacetOriginsbOriginstNamesbNamestValuesbValuestStopbStop tCream bCream!"tFinish"!bFinish#$tGlue$#bGlue%&tTest&%bTest'( tKeepout(' bKeepout)* tRestrict*) bRestrict++ vRestrict,,Drills--Holes..Milling//Measures00Document11Reference22dxf34tDocu43bDocu56 tGND_GNDA65 bGND_GNDA87wert[[Nets\\Busses]]Pins^^Symbols__Names``ValuesaaInfobbGuidedMusteree Patch_TopffVscorehhNamett Patch_BOTyy_tsilkzz_bsilkHeatSink 200bmp 201bmp 202bmp 203bmp 204bmp 205bmp 206bmp 207bmp 208bmpDescriptSMDroundcooling f3Drcl-ez b(p|R1206+7@7#2+t@7#1"35%@L@"35%L&3;"&35%A;"1n, >NAME1n >VALUE"'ff&`f&"'`f&`"'`f"'fff&&#H X b(|C12061d, >NAME1d >VALUE"'ff&`f&"'`f"'fff&"'`f&`+P@(#1+6@(#2&3+!&3-%zB=!"3N%"3NB%B&#1_ngv(|SOD1231jJ >NAME1 >VALUE"'ދf&"tf&"'"tދ"'ދދf&"'"tf&"t"3f3"3fB3B"3fBf"33B3+@|+hB@ANODE&3l &35fL "3"3x"3x"3"3x&#_Xrcl b(|C12061d1 >NAME1dȜ >VALUE"'ff&`f&"'`f"'fff&"'`f&`+P@(#1+6@(#2&3+!&3-%zB=!"3N%"3NB%B&#1_ b(|R1206+7@7#2+t@7#1"035%@L@"035%L&3;"&35%A;"1d1 >NAME1dȜ >VALUE"'ff&`f&"'`f&`"'`f"'fff&&#H X-mellis|+Ȝ8c11+Ȝ13+ȜȜ15+r8c12+r14+rȜ16%9Ԕ{1ȜԔ 1G$|"0pPp"0yU"2"0Pkk"03$Kp$Kk"03$Kkԁk"03$Kpԁp+D0D++D@0D-+D0GND+D0ID+l8P0'GND@1+lȯ0'GND@2+D8P0'GND@4+Dȯ0'GND@3+D>0VBUS1Ȝ1 >NAME1Ȝ >VALUED+SJFAB+>A1+A2"36PnP1,(>NAME"36'~@x"3n'y"3VALUE4crystal3*x|HC49UP+|C.h%1+.h%2"0m8,zaO "0 , VT"0`O,"0>,>VT"0dzd"0z"0z11"0R*"03>"03>"03"0R> {"03>Z>,"0>>Z"0dZ "01,"0[ "03Z, "03Z, "0m8Zz "03ndZznd,"0ndZzd "0nd,z1 "03"03m8Zzm8,"03 Z "03  "03  ,"0 Z"0 * z"03 "03 "0z`O`O"0RB^*B^"0RB^>VTx"0 VT*B^y1 $m(>NAME1 J\(>VALUE"02"02 2"0 2 "0 "022"0222"02P"0"02"0'&+w$}#Vj}SOIC14+,kM )+1+,ke )+14+ȜM )+2+dM )+3+Ȝe )+13+de )+12+M )+4+e )+111O(>NAME+1M )+5+8cM )+6+1e )+10+8ce )+9+ԔM )+7+Ԕe )+8"3RY " E"3ERYE1Ȝ(>VALUE"RYERY &3:dGro&3֕Go&3rGVo&3Go&3*G8o&3F\G*jo&3Gƛo&3aƛ&3F\a*j&3*a8&3a&3raV&3֕a&3:dar%w"3+"3++"3+"318c*d*0abISP11*d*0F&+"0dd(]d"0(]d(]*"0(]*d*"0d*dd.PSz</R1494X 5 .$̖/R2494& 5pAo .t/R31K4  50e . v^/C10.1uF4Ęo 5dI .o/R1010K4v86 5v8NV .Γ /D13.3V4p 5#p .؎l/D23.3V4Ę 5Ę .hvB /C310uF4 5o . /U$12X3HEADER.nXQ /Q112MHz4(5&>(.t;/C218pF4t;r 5r .hC/C418pF4b~@ 5*~@ .ԔvB/X1USB_MINIB.JVT/SJ24̌(5VTd .*V/IC12}4}z(5b (.!/R404| 5: ."/SJ1SJFAB4(5"d .t v/R54994 5&j ZZ N$1>>>> "0ZNqPS v"0pLlZNq"0$:` :`"0 :`>o"0(a$:`"0PSPS{"0PS{pLl"ZN"ZNPS">֑"0e"0etr"trtt"tt">o>֑" "fN$2>>> "3BbLB "3$D[BbL"3B 6 "3$@_$D["3(vBLvB"3LvB$@_#"D|VCC>>>> >>"0)r"0()"0rh&y"0VTVT"0|"0VTLY"0B^"0"0VTB^>"J֑ v֑"hJ֑" v֑ v"h&yh"̖1!3"1!3ƕ"{̖̖"ƕƕi" v{̖"zLYLY"jJzLY"jJjJ"#)jJ"##)"LYVT"1!3#" v" v v"h&y4bGND>>>> > > > >>"3hJ "3J fQ "3h h"3)h"3()"3hh "3VlV2b"3V2b v"3@lVl"3 v v"3z"3 "3ngo"3VJ.h"3.hVJ.h"3o=.h"3"3oo="OLq"Oƕ2"ƕ2ƕ 5"Lq@l"$z<|z<"|z<z<" $z<" 0 "z 0"z.z" z."$ "z<O"($"rs"r2r"pAr2"3pApA" А3pA" ƕ А"H ƕ"&H"|pA&"sng"|z<|pA pN$4> > >"3bL"3bLXQ"3 "3NVb֑"3b֑bi"3XQNV pN$5> > >"3vvbL"3vbL{XQ"3$rv"3 bLnD"3rbL bL"3nDi"3{XQrbL uMOSI> > "3n(g,(g"3,(gr!"3r!R!"3R!${"3${$V"3$Vj"3nin(g"3jn/~MISO> >"3n 5n7"3d7BT7"3BT7x"3n 5d7"3xјs;SCK> > "0n"nv"0v"0ј"1ҍҍ 5"ҍ VS;RST> > >"0"0@Y"0јg"1јg"16\6\ 5"6\"3 hNzVCC'> >"3nso s"3nss s"3VT-"3- s"3 sx s"3 VTVT"3x snsM/~D->>"3b 5b>Z"3PSxx"3xb4_"3PStPSx"3b4_b 5 D+>> > "3$"3TM"3uҍl"3TMu"3$X$"3ҍlҍi"3u6\l"36\l6\iN$3>>"3"""3"( $>pRESET>>>"3*i*nD"3*i*x?"3/x?""3">""3/x?*i"3>"d,"3d6 "3>"d6"3 |76pDN$6>>"= v="< v= v"=<RESISTOR

chipCAPACITOR

chipSMALL OUTLINE DIODECATHODECAPACITORRESISTOR2X3_SMDUSB_MINIBCRYSTALattiny24_44_84Small Outline PackageATTINY24/44/84-SSU!k default *EAGLE Design Rules

The default Design Rules have been set to cover a wide range of applications. Your particular design may have different requirements, so please make the necessary adjustments and save your customized design rules under a new name.(1*16)xV4 <????????   ??8c 2 dd^^^^^^^^^^^^^^^^:]% <default!Ceͫm% 5!Ceͫl % 5!Ceͫq% 5!Ceͫ% 5!Ceͫ?% 5!Ceͫ0|\% 5!CeͫqR% 5!CeͫR# ؓ@1 '' dd0 mx# @ 1 '' dd0 N# @ 1 '' dd0 xf# @ 1c  'dd0 аQ# `@ 1c 'dd0 5ѽ# 0@ 1c 'dd0 &># @ 1c 'dd0 [虙