RST
GND
MISO
MOSI
SCK
VCC
FTDI
VCC
GND
PBO
PB1
PB3 / RST
PB2
PA1
PA2
PA3
PA4
PA5
PA5
PA6
PA7
PA0
20MHz
DC
JACK
PB2
PA7
PA6
GND
GND
GND
GND
GND
VCC
VCC
VCC
VCC
PA2
PA3
PA4
PA5
VCC
VCC
GND
GND
Tx
Rx
RTS
CTS
10K
1uF
VCC
GND
5V
GND
>NAME
>VALUE
<b>Small Outline Package</b>
>NAME
>VALUE
1
>NAME
>VALUE
>NAME
>VALUE
>NAME
<b>EAGLE Design Rules</b>
<p>
Die Standard-Design-Rules sind so gewählt, dass sie für
die meisten Anwendungen passen. Sollte ihre Platine
besondere Anforderungen haben, treffen Sie die erforderlichen
Einstellungen hier und speichern die Design Rules unter
einem neuen Namen ab.
<b>EAGLE Design Rules</b>
<p>
The default Design Rules have been set to cover
a wide range of applications. Your particular design
may have different requirements, so please make the
necessary adjustments and save your customized
design rules under a new name.
Since Version 6.2.2 text objects can contain more than one line,
which will not be processed correctly with this version.