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Week 04 - system engineering design

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this will be an update on a number of things:

h_eon cadquery pipeline >

designing the h connectors using eye of the needle geometry requires juggling quite a few variables; awhile back, I made a spaghetti code pipeline to generate h_compliant geometry, which ultimately didn’t work very well; the design tended to collapse on itself. The code also wasn’t very modular and had some blended concerns, which caused certain parameters to break the model.

however, it did prove to me that creating this sort of geometry using cadquery was not only possible, but fruitful; design changes were a number change and running a script for exported files, whereas point and click cad like Solidworks requires about 15 clicks between changing the parameter and saving an exported file somewhere, not to mention auto-naming is out of the question. Additionally, that exercise helped me write some helper functions (with massive help from chatgpt) that were general purpose and would assist me in my second attempt at creating a connector cadquery pipeline.

h_eon does a much better job at separating the code into constituent concerns, and like its predecessor, enables applying something like range() to any arbitrary parameter to generate a range of values for ready-to-fab testing.

I also identified that svg export is far superior to dxf export in cadquery; the path is ready for cutting almost immediately in the exported and converted state. the caveat is needing to rescale the svg to the correct dimensions. I need to continue building on the pipeline to account for that, but for now, this is reasonably efficient.

o_power design >

using the pcb endmill, I ran a couple of designs and discovered I prefer isolated oval slots instead of circular holes for connection points. I also decided on a 10mm pitch grid, and something like 9.5mm edge to edge for the actual tiles; the pitch is intuitive and makes math easy, while the edge to edge value is important to prevent binding due to tolerance mismatch. remains to be seen whether the construction will be rigid enough due to these decisions.

while I was able to test connector fit in principle, the reality is I can only mill unplated slots in FR-1, whereas I needed plated slots to truly test whether my connector geometry would “comply” well.

unfortunately I haven’t yet setup my ecad pipeline, so I manually built 6 tile designs (for the NAND gate) and a 8x8 macro tile that will serve as the build plate.

lumenpnp >

I’ve been prioritizing closing the loop on placing tiles over custom end-effector development and machine design, thus using the lumenpnp. I see it as a stepping stone towards a custom machine using the clank motion platform.

tray >

I modified some of my earlier tray geometry for feeding tiles to be more linear, simulating a tape-and-reel holder. I used sla supports to my advantage and nitto-taped it to the build surface. it was a good opportunity to test siraya-tech blu resin, which worked great. the print itself was only ~30min.

nozzles >

since I first setup the lumenpnp and now, it appears that some of the nozzle vision pipelines received updates, which appears to improve reliability.

after messing testing with both the 45 and 24 vaccuum nozzles, I identified the 24 was more suitable for tiles; the 45 has a really small nozzle and is more suitable for 0603-sized components or other ICs; not cm-sized pcbs.

eventually, I managed to get the nozzle picking semi-reliably with the tiles. however, on failed pick, I haven’t yet figured out how to get the job to gracefully fail and continue. this will be critical if we want continuous fault-tolerant jobs.

I also learned that kicad has a pnp specific origin, separate from the other origins already on the board. making sure these numbers work relative to the lumenpnp were a major pain, but I eventually solved it. I believe the process is supposed to be easier than it was, but its possible there was file-spoofing.

placement >

I managed to place 3 tiles on double-sided tape using a modular-things board as a dummy substrate. I think the z-height of the board was off, as the nozzle appeared to be dropping tiles onto the tape instead of sticking them on. however, in general it was a success; I was able to feed openpnp a .pos file, setup a job, define tiles as components to be placed, etc.

vision >

tiles vision pipeline may need refinement; some of them worked, but others failed to register as squares.

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