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Week 07 - component documentation

group page // repo source files // objectives

meta
recap
geometry - tiles and connectors, in-house vs out-source
tooling - idc compliant pin connector forming tool
ring oscillator - Shravika’s design, 4x4 concept design and 3d implementation
claw gripper - documentation

meta >

recap from last post
- new tiles (up to 7 tiles, 3 macro-tiles)
- automatic placement up to 50-60% success rate
geometry
- ordered h connectors from pcbway (as-milled and tin-plated)
- pcbway can’t do under 0.5mm features apparently
tooling
- IDC 0.1 form tooling for compliant contact
ring oscillator
- Shravika has been working on implementing the ring oscillator
- I’ve been working on shrinking circuits to fit 4x4 form factor, noting some routing limitations with the current tiles
claw documentation

recap >

machine placement >

new tiles >

ordered some new macro tiles (4x4, 4x8, 8x8) and new resistor tile (1206_vert). new macro tiles feature no border, which enable them to tile just like the 1x1 tiles. new resistor tile features integrated power on one of the terminals, and can be rotate 180 deg to connect to vcc or gnd.

new tiles - batch 2 >

old tiles - batch 1 >

geometry - tiles and connectors, in-house vs out-source >

under economical and tolerance constraints, pcbway and other pcb houses are perfectly suited for outsourcing tiles to.

pcbway and like seem to be good for connectors as well, especially for queuing post processes like electropolishing and electroplating; in-house procedures would require a whole additonal setup, replicating beaker chemistries that are common in industry.

however, recent experiments with outsourcing connectors to pcbway have shown that there is a 0.5mm feature limit (both clearance and width), which makes it impossible to fabricate the connectors as is. this is in addition to the cost, which is relatively high compared to sourcing sheet metal for the fablight (though perhaps, post-processing included would make the costs somewhat comparable).

as the in-house connectors are “good enough” as-is, it seems that fabricating in-house is still the way to go. production as we shrink to smaller size-scales will become an even more interesting challenge; we’ll likely need to leverage mit.nano more heavily to achieve scale production.

tooling - idc compliant pin connector forming tool >

./idc0.png ./idc1.png

the IDC connector geometry requires forming contacts to create compliant pins that can wipe against a mated connector to form an electrical connection.

./form0.png

to achieve this, several stages must be aligned and mated. tool stackup, top to bottom:

./form1.png

toolBacker - constrains toolTop within toolHolder
toolHolder - holds toolTop
- toolTop - designed with form geometry to fit compliant pin profile
topClamp - clamps down on leadframe from top
botClamp - other mating half of the clamp and includes pins for registration, also holds toolBot
- toolBot - mates against toolTop to form the leadframe
mud - modular unit die, botClamp is installed using screws and can be swapped out; (term not used completely correctly here)
- https://www.dme.net/MUD/
arborBase - base of the arbor press

taking stock of the components we have in inventory, designed the forming tool using 3/8” linear shafts and plain flanged bushings, which are plentiful and cost-effective should I decide to order more.

to constrain the bushing into each moving stage (toolBacker, toolHolder, topClamp), I iterated on a 1 deg drafted/tapered hole press-fit geometry which makes it easy to insert the bushing, but press-fits at the end of the geometry. under compression, the bushing is kept constrained in the stage. the geometry is modeled after crushribs, where the contact surface is reduced a bit using cuts for compliance. I found that 6 cuts were sufficient, and 4 still worked. adding additional cuts caused the press-fit to deteriorate.

the flanges caused some issues, leading to surfaces butting against each other prematurely, but I fixed that by adding some additional drafted/tapered hole standoffs.

after forming, the form tool appears to have transferred the geometry to the leadframe, creating a compliant pin geometry. however, a fix is wip because the action window wasn’t big enough, and due to the system not being flush, I ended up bending some of the idc contacts intended for displacing wire.

here’s a ct scan of the resulting leadframe:

ring oscillator - Shravika’s design, 4x4 concept design and 3d implementation >

Shravika (my UROP) worked on a ring oscillator application circuit and has it almost working; intended to test resonance frequency of the FETs we’re using for the SERV cpu.

3-layer 4x4 concept design for compressing the ring oscillator from 8x8 to 4x4.