//
//
// bus.ftdi.bridge.c
//
// 115200 baud bus FTDI byte bridge
//
// set lfuse to 0x7E for 20 MHz xtal
//
// Neil Gershenfeld
// 12/11/11
//
// (c) Massachusetts Institute of Technology 2011
// Permission granted for experimental and personal use;
// license for commercial sale available from MIT.
//

#include <avr/io.h>
#include <util/delay.h>
#include <avr/pgmspace.h>

#define output(directions,pin) (directions |= pin) // set port direction for output
#define set(port,pin) (port |= pin) // set port pin
#define clear(port,pin) (port &= (~pin)) // clear port pin
#define pin_test(pins,pin) (pins & pin) // test for port pin
#define bit_test(byte,bit) (byte & (1 << bit)) // test for bit set
#define bit_delay_time 8.5 // bit delay for 115200 with overhead
#define bit_delay() _delay_us(bit_delay_time) // RS232 bit delay
#define half_bit_delay() _delay_us(bit_delay_time/2) // RS232 half bit delay
#define char_delay() _delay_ms(10) // char delay

#define ftdi_port PORTA
#define ftdi_direction DDRA
#define ftdi_pins PINA
#define ftdi_pin_in (1 << PA1)
#define ftdi_pin_out (1 << PA2)

#define bus_port PORTA
#define bus_direction DDRA
#define bus_pins PINA
#define bus_pin_in (1 << PA7)
#define bus_pin_out (1 << PA6)

void get_ftdi_char(char *rxbyte) {
   //
   // read character into rxbyte from FTDI
   //    assumes line driver (inverts bits)
   //
   *rxbyte = 0;
   while (pin_test(ftdi_pins,ftdi_pin_in))
      //
      // wait for start bit
      //
      ;
   //
   // delay to middle of first data bit
   //
   half_bit_delay();
   bit_delay();
   //
   // unrolled loop to read data bits
   //
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 0);
   else
      *rxbyte |= (0 << 0);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 1);
   else
      *rxbyte |= (0 << 1);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 2);
   else
      *rxbyte |= (0 << 2);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 3);
   else
      *rxbyte |= (0 << 3);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 4);
   else
      *rxbyte |= (0 << 4);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 5);
   else
      *rxbyte |= (0 << 5);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 6);
   else
      *rxbyte |= (0 << 6);
   bit_delay();
   if pin_test(ftdi_pins,ftdi_pin_in)
      *rxbyte |= (1 << 7);
   else
      *rxbyte |= (0 << 7);
   //
   // wait for stop bit
   //
   bit_delay();
   half_bit_delay();
   }

void get_bus_char(char *rxbyte) {
   //
   // read character into rxbyte from bus
   //    doesn't assumes line driver (doesn't invert bits)
   //
   *rxbyte = 0;
   while (0 == pin_test(bus_pins,bus_pin_in))
      //
      // wait for start bit
      //
      ;
   //
   // delay to middle of first data bit
   //
   half_bit_delay();
   bit_delay();
   //
   // unrolled loop to read data bits
   //
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 0);
   else
      *rxbyte |= (1 << 0);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 1);
   else
      *rxbyte |= (1 << 1);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 2);
   else
      *rxbyte |= (1 << 2);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 3);
   else
      *rxbyte |= (1 << 3);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 4);
   else
      *rxbyte |= (1 << 4);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 5);
   else
      *rxbyte |= (1 << 5);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 6);
   else
      *rxbyte |= (1 << 6);
   bit_delay();
   if pin_test(bus_pins,bus_pin_in)
      *rxbyte |= (0 << 7);
   else
      *rxbyte |= (1 << 7);
   //
   // wait for stop bit
   //
   bit_delay();
   half_bit_delay();
   }

void put_ftdi_char(char txchar) {
   //
   // send character in txchar to FTDI
   //    assumes line driver (inverts bits)
   //
   // start bit
   //
   clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   //
   // unrolled loop to write data bits
   //
   if bit_test(txchar,0)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,1)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,2)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,3)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,4)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,5)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,6)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   if bit_test(txchar,7)
      set(ftdi_port,ftdi_pin_out);
   else
      clear(ftdi_port,ftdi_pin_out);
   bit_delay();
   //
   // stop bit
   //
   set(ftdi_port,ftdi_pin_out);
   bit_delay();
   //
   // char delay
   //
   bit_delay();
   }

void put_bus_char(char txchar) {
   //
   // send character in txchar to bus
   //    doesn't assumes line driver (doesn't invert bits)
   //
   // start bit
   //
   set(bus_port,bus_pin_out);
   bit_delay();
   //
   // unrolled loop to write data bits
   //
   if bit_test(txchar,0)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,1)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,2)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,3)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,4)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,5)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,6)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   if bit_test(txchar,7)
      clear(bus_port,bus_pin_out);
   else
      set(bus_port,bus_pin_out);
   bit_delay();
   //
   // stop bit
   //
   clear(bus_port,bus_pin_out);
   bit_delay();
   //
   // char delay
   //
   bit_delay();
   }

int main(void) {
   //
   // main
   //
   static char chr;
   //
   // set clock divider to /1
   //
   CLKPR = (1 << CLKPCE);
   CLKPR = (0 << CLKPS3) | (0 << CLKPS2) | (0 << CLKPS1) | (0 << CLKPS0);
   //
   // initialize output pins
   //
   set(ftdi_port, ftdi_pin_out);
   output(ftdi_direction, ftdi_pin_out);
   set(bus_port, bus_pin_out);
   output(bus_direction, bus_pin_out);
   //
   // main loop
   //
   while (1) {
      if (!pin_test(ftdi_pins,ftdi_pin_in)) {
         get_ftdi_char(&chr);
         put_bus_char(chr);
         }
      if (pin_test(bus_pins,bus_pin_in)) {
         while(pin_test(bus_pins,bus_pin_in))
             ;
         //get_bus_char(&chr);
         put_ftdi_char(0x55);
         //put_ftdi_char(chr);
         }
      }
   }
